Beyond 224G: Navigating the Future of Co-Packaged Copper

Relentless demand for faster, denser interconnects for AI data centers has engineers planning for speeds beyond 224G. While pluggable optics still handle long-reach connections, co-packaged copper provides a compelling alternative for shorter runs by offering significant advantages in power consumption, lower latency and overall system cost.

As 224G technology just begins its deployment across the broader market, the strategic path forward remains wide open. For any system architect contemplating the future of co-packaged copper, understanding the trade-offs of each physical-layer path is the critical first step.

Picking the right physical layer comes down to balancing the difficulty of the analog channel with the complexity and power consumption of the digital signal processing. While PAM-8 has been discussed in the industry, engineers generally consider it too complex for practical implementation. That leaves three primary competing paths: 336G PAM-4, 448G PAM-6 and 448G PAM-4.

336G PAM-4
Choosing the 336G PAM-4 option offers an easier channel target with a lower Nyquist frequency of roughly 84 GHz. Some hyperscalers view the 336G route as a pragmatic, incremental step that uses established codecs. However, the 336G PAM-4 scheme delivers lower aggregate throughput per lane compared to 448G alternatives. The primary downfall is that 336G PAM-4 may only be a temporary fix, requiring further migration and redesign in the near future.

448G PAM-6
Currently, the PAM-6 modulation scheme is the most practical way to hit 448G data rates. The PAM-6 method avoids the extreme 110 GHz+ Nyquist realm, making the transition an easier engineering leap from current 224Gbps PAM-4 designs.

At the same time, 448G PAM-6 introduces tighter signal-to-noise ratio (SNR) needs and potential interoperability complications due to its non-power-of-two mapping. Because PAM-6 compresses six amplitude levels into the same voltage swing, the signal eye opening becomes significantly smaller. This leaves the signal susceptible to crosstalk, jitter and non-linear distortion across the channel.

448G PAM-4
The 448G PAM-4 path is the ideal approach to achieving optical equivalence with the simplest symbol mapping. PAM-4 promises the best cost per bit if engineers can build a manufacturable channel.

Reaching the milestone means a complete footprint redesign to overcome the most demanding Nyquist frequency of around 112 GHz. The industry goal is to meet the 112 GHz target without introducing new constraints for surface roughness or pad cleanliness. While the PAM-4 signal itself processes more easily and cleanly in the digital realm, generating the necessary analog frequency proves significantly harder for hardware developers.

Pushing the Nyquist fundamental frequency to 112 GHz puts immense strain on the signal integrity of the physical interconnects and materials. Hitting these speeds means carefully weighing an acceptable SNR and avoiding over-reliance on power-hungry digital signal processing (DSP).

Trace and Interposer Loss
To keep the signal intact at 112 GHz, boards need ultra-smooth copper traces. Traditional rougher copper forces the high-frequency signal to travel over microscopic bumps, which drastically increases insertion loss along the transmission line. Because ultra-smooth copper increases the risk of board delamination, fabricators rely on specialized bonding films to secure the traces without degrading the signal quality.

Maintaining signal integrity at extreme frequencies also forces a transition to dielectrics with lower dissipation factors. Engineers often use hybrid stack-ups that combine Teflon-based materials with traditional fiberglass to balance low-loss characteristics with the mechanical stability needed.

Connector and Cable Budgets
Small impedance mismatches in contact geometries or dielectric transitions cause significant reflections that corrupt the high-speed signal. Designers must uncover and eliminate every possible source of loss. Cleaning up the signal path often means optimizing connector architectures and minimizing mating interfaces to reduce signal degradation.

Equalization and Thermal Tradeoffs
Advanced digital signal processing can compensate for some channel impairments using transmitter pre-emphasis and receiver equalization. Relying on heavier processing loads increases silicon power consumption and raises thermal density, creating complex system-level cooling challenges.

Heavy digital signal processing becomes impractical once the added power consumption and latency push the total cost of ownership above that of competing optical solutions. When the power burden becomes too high, architects must rely on a cleaner physical channel instead.

Manufacturing Yield Risks
The difference between a successful lab demonstration and a manufacturable channel comes down to strict process control. At extreme frequencies, the tolerance window on every stamped and molded feature becomes incredibly tight. Small variations in the assembly process, such as substrate warp, can shrink SNR margins and jeopardize production yields at scale.

With tighter margins, even microscopic manufacturing variances in contact geometry or substrate planarity can push a channel out of specification. Minor assembly tolerances quickly turn into significant yield losses on the manufacturing floor.

Moving high-frequency copper links from the laboratory to the data center rack depends on strict alignment across the entire manufacturing ecosystem. Ultimately, the market standard will emerge from whichever of the three scenarios can first produce a manufacturable channel at the required Nyquist frequency with acceptable cost and power metrics.

Organizations like OIF and IEEE guide interoperability testing, but no clear standard exists yet for the next leap in co-packaged copper technology. Silicon SerDes vendors ultimately dictate the available modulation options and shape the timeline for viable deployments. Widespread hyperscaler adoption is likely to occur when a major data center operator or switch vendor integrates a solution, creating a de facto standard for the rest of the industry to follow.

Among the three scenarios, if 448G PAM-6 struggles with interoperability or 448G PAM-4 proves too difficult to manufacture at the 112 GHz Nyquist frequency, system architects will need staged migration strategies. In that event, 336G PAM-4 emerges as the most likely fallback path for the industry.

System architects need practical hardware for today while keeping an eye on future demands. The Molex strategy focuses on iterating and refining the existing Impress platform, building on the manufacturing expertise gained from producing millions of near-ASIC interconnects for enterprise applications.

To support the most likely near-term paths, Molex manufactures demonstrator kits and validated evaluation boards for 336G PAM-4 and 448G PAM-6 links. At the same time, engineers are actively testing ultra-low-loss materials and advanced micro-connector geometries to reach the optical goal of 448G.

Molex is also doubling the differential pair count to address the distinct needs of the switch market versus the GPU market. When a design still calls for optics, Molex continues to support the broader ecosystem with core solutions such as the ELSFP Interconnect System. These components provide reliable integration across both copper and optical pathways.

To navigate these choices, learn how Molex co-packaged copper solutions deliver the reliable performance and manufacturing scale essential for next-generation data center architectures.